1. Field of the Invention
The present invention relates to a semiconductor memory device having dual ports, such as a dual-port random access memory (dual-port RAM).
2. Description of the Related Arts
In a dual-port random access memory device, it is possible to write data into a memory cell of a memory cell matrix through one port while data is read from a memory cell of a memory cell matrix through the other port. Thus, the speed of access to the data is increased, and an exchange of data between two similar memory systems having the dual-port random access memory in common is carried out quickly.
In a prior art dual-port random access memory device, word lines and bit lines of each of the two ports are driven independently, and a specific memory cell is selected for each of the two ports. Where one port is in the writing state and the row address of the memory cells selected by both ports is the same row address, i.e., data is written into a memory cell from one side port (e.g., port A) and the word lines of both sides are accessed, all transfer gates of the memory cell are in the conductive state. In this case, when a data writing is carried out, a portion of the current is passed from the bit line of one side port (e.g., port A) through the transfer gate to the bit line of the other side port (e.g., port B). Where the other side port (e.g., port B) is in the reading state and the data in the memory cell is to be reversed by the bit line of the side of the one side port (e.g., port A), it is necessary to reverse the potential of the bit line of the side of the other side port (e.g., port B) and to supply the drive current for the potential reversal from the side of the one side port (e.g., port A).
In a prior art dual-port random access memory device, the transfer gate of the memory cell is generally constituted by MOS type transistors having a high resistance even in the conductive state, and thus a capacitance against the ground of the bit lines of the side of the other side port (e.g., port B) exists, and accordingly, the time constant for the potential reversal is prolonged. In consequence, a problem arises in that the time required for writing data becomes longer than usual, and accordingly, the data writing speed is reduced.